1. Field of the Invention
Embodiments of the invention generally relate to methods for depositing silicon-based materials. More specifically, the present invention relates to chemical vapor deposition techniques for fabricating multi-layer silicon nitride spacer structures.
2. Description of the Related Art
A spacer structure is an integral part of many devices formed on an integrated circuit (IC). In one example, spacer structures may be utilized in a field effect transistor (e.g., a complementary metal-oxide-semiconductor (CMOS) field effect transistor, and the like) to insulate and protect gate structures of the transistor from materials disposed adjacent to the gate structure. The spacer structure is disposed between various dielectric and conductive layers of the transistor and has complex interfacing requirements, for example, diffusion and barrier characteristics, intrinsic stress, bond strength, material compatibility, and the like.
Fabrication of spacer structures represents a challenging task and often the interfacing requirements are only partially met, or are met at the expense of low yield. In addition, present manufacturing techniques utilize different processing tools, resulting in extended duration and high cost of fabricating the spacer structures.
Thus, there is a need in the art for an improved method for fabricating a spacer structure of a field effect transistor.